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Design Optimization Methodology for On-Chip Spiral Inductors
Kenichi OKADA Hiroaki HOSHINO Hidetoshi ONODERA
IEICE TRANSACTIONS on Electronics
Publication Date: 2004/06/01
Print ISSN: 0916-8516
Type of Manuscript: Special Section PAPER (Special Section on Analog Circuit and Device Technologies)
spiral inductor, response surface method, optimization, quality factor,
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This paper presents a methodology for optimizing the layout of on-chip spiral inductors using structural parameters and design frequency in a response surface method. The proposed method uses scattering parameters (S-parameter) to express inductor characteristics, and hence is independent of spiral geometries and equivalent circuit models. The procedure of inductor optimization is described, and a design example is presented.