Gate-to-Bulk Overlap Capacitance Extraction and Its Circuit Verification

Masanori SHIMASUE
Yasuo KAWAHARA
Takeshi SANO
Hitoshi AOKI

Publication
IEICE TRANSACTIONS on Electronics   Vol.E87-C    No.6    pp.929-932
Publication Date: 2004/06/01
Online ISSN: 
DOI: 
Print ISSN: 0916-8516
Type of Manuscript: Special Section PAPER (Special Section on Analog Circuit and Device Technologies)
Category: 
Keyword: 
CGBO,  modeling,  extraction,  MOSFET,  simulation,  

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Summary: 
Gate-to-bulk overlap capacitance (CGBO) cannot be ignored for long gate channel MOSFET's that are used for various I/O and analog circuits. We present a simple and yet accurate CGBO measurement and extractions by using a group of MOSFET's. Dedicated test structures using 0.18 µm shallow trench isolation technology were fabricated for the purpose. The effect of CGBO has been successfully analyzed. Validity of the CGBO extraction has been verified by comparing measured time delay of 51 stage ring oscillators with simulated data using our customized UCB SPICE3 simulator.