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An Efficient VLSI Architecture of 1-D Lifting Discrete Wavelet Transform
Pei-Yin CHEN Shung-Chih CHEN
IEICE TRANSACTIONS on Electronics
Publication Date: 2004/11/01
Print ISSN: 0916-8516
Type of Manuscript: LETTER
Category: Integrated Electronics
VLSI, discrete wavelet transform, lifting scheme,
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An efficient VLSI architecture for 1-D lifting DWT is proposed in this paper. To achieve higherhardware utilization and higher throughput, the computations of all resolution levels are folded to both the same high-pass and low-pass filters. Besides, the number of registers in the folded architecture is minimized by using the generalized lifetime analysis. Owing to its regular and flexible structure, the design can be extended easily into different resolution levels, and its area is independent of the length of the 1-D input sequence. Compared with other known architectures, our design requires the least computing time for 1-D lifting DWT.