Multiple Programming Method and Circuitry for a Phase Change Nonvolatile Random Access Memory (PRAM)

Masashi TAKATA  Kazuya NAKAYAMA  Toshihiko KASAI  Akio KITAGAWA  

IEICE TRANSACTIONS on Electronics   Vol.E87-C    No.10    pp.1679-1685
Publication Date: 2004/10/01
Online ISSN: 
Print ISSN: 0916-8516
Type of Manuscript: Special Section PAPER (Special Section on New Era of Nonvolatile Memories)
Category: Phase Change RAM
multi-bit,  phase change,  NVRAM,  OUM,  

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A novel multiple programming method for a phase change nonvolatile random access memory (NVRAM) is proposed. The resistance of the chalcogenide semiconductors (phase change materials, e.g. SeSbTe) stacked on the memory cell is controlled by the number of the applied current pulses, and we have observed experimentally 4-valued resistance in the range of 42 k-2.1kΩ at the SeSbTe discrete memory cell. On the basis of this experimental results, the 4-valued memory circuit was designed with CMOS 0.35 µm process. It has been confirmed with a circuit simulation that the multi-bit read circuit proposed works successfully under a read cycle operation over 100 MHz at 3.3 V supply voltage and the read operation is completed within 3 nsec.