BIAS) and modulation current (IMOD) setting of the laser driver. Tests show that the chip can stabilize and track the launched optical power with a tolerance of less than 1 dB. In these tests the pattern detection was programmed to sample the current comparators after 5 bytes (32 ns at 1.25 Gbps) of consecutive 1's and 0's. Automatic power control on such short strings of data has not been demonstrated before. Although this laser transmitter was developed for FSAN GPON applications at a speed of 1.25 Gbps upstream, the design concept is generic and can be applied for developing a wide range of burst mode laser transmitters. This chip was developed in a 0.35 µm SiGe BiCMOS process." />


Current Mode Circuits for Fast and Accurate Optical Level Monitoring with Wide Dynamic Range

Johan BAUWELINCK  Dieter VERHULST  Peter OSSIEUR  Xing-Zhi QIU  Jan VANDEWEGE  Benoit DE VOS  

Publication
IEICE TRANSACTIONS on Communications   Vol.E87-B   No.9   pp.2641-2647
Publication Date: 2004/09/01
Online ISSN: 
DOI: 
Print ISSN: 0916-8516
Type of Manuscript: PAPER
Category: Devices/Circuits for Communications
Keyword: 
burst mode laser driver,  current comparator,  active-input current mirror,  optical feedback loop,  BiCMOS,  

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Summary: 
This paper presents a new approach based on current mode circuits for fast and accurate optical level monitoring with wide dynamic range of a gigabit burst-mode laser driver chip. Our proposed solution overcomes the drawbacks that voltage mode implementations show at higher bit rates or in other technologies. The main speed-limiting factor of the level monitoring circuitry is the parasitic capacitance of the back facet monitor photodiode. We propose the use of an active-input current mirror to reduce the impact of this parasitic capacitance. The mirror produces two copies of the photo current, one to be used for the "0" level measurement and another for the "1" level measurement. The mirrored currents are compared to two reference currents by two current comparators. Every reference current needs only one calibration at room temperature. A pattern detection block scans the incoming data for patterns of sufficiently long consecutive 0's or 1's. At the end of such a pattern a valid measurement is present at the output of one of the current comparators. Based on these measurements the digital Automatic Power Control (APC) will adjust the bias (IBIAS) and modulation current (IMOD) setting of the laser driver. Tests show that the chip can stabilize and track the launched optical power with a tolerance of less than 1 dB. In these tests the pattern detection was programmed to sample the current comparators after 5 bytes (32 ns at 1.25 Gbps) of consecutive 1's and 0's. Automatic power control on such short strings of data has not been demonstrated before. Although this laser transmitter was developed for FSAN GPON applications at a speed of 1.25 Gbps upstream, the design concept is generic and can be applied for developing a wide range of burst mode laser transmitters. This chip was developed in a 0.35 µm SiGe BiCMOS process.