Fast Consecutive Zero and One bits Detection Circuits for a 1.25 Gbit/s Burst Mode Laser Driver

Dieter VERHULST  Yves MARTENS  Johan BAUWELINCK  Xing-Zhi QIU  Jan VANDEWEGE  

Publication
IEICE TRANSACTIONS on Communications   Vol.E87-B   No.8   pp.2377-2379
Publication Date: 2004/08/01
Online ISSN: 
DOI: 
Print ISSN: 0916-8516
Type of Manuscript: LETTER
Category: Communication Devices/Circuits
Keyword: 
divider,  delay line,  detection,  high-speed flip-flop,  

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Summary: 
This letter describes consecutive zero and one bits detection circuits designed for a 1.25 Gbit/s burst mode laser driver realized in a SiGe 0.35 µm BiCMOS technology with 3.3 V power supply. The architecture is based on a frequency divider and a delay line counting per four consecutive zero or one bits. The detector was designed with high-speed split-output stage flip-flops modified to have a reset input. Experimental results validate the design of the detector.