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Fast Consecutive Zero and One bits Detection Circuits for a 1.25 Gbit/s Burst Mode Laser Driver
Dieter VERHULST Yves MARTENS Johan BAUWELINCK Xing-Zhi QIU Jan VANDEWEGE
IEICE TRANSACTIONS on Communications
Publication Date: 2004/08/01
Print ISSN: 0916-8516
Type of Manuscript: LETTER
Category: Communication Devices/Circuits
divider, delay line, detection, high-speed flip-flop,
Full Text: PDF(222.2KB)>>
This letter describes consecutive zero and one bits detection circuits designed for a 1.25 Gbit/s burst mode laser driver realized in a SiGe 0.35 µm BiCMOS technology with 3.3 V power supply. The architecture is based on a frequency divider and a delay line counting per four consecutive zero or one bits. The detector was designed with high-speed split-output stage flip-flops modified to have a reset input. Experimental results validate the design of the detector.