Low-Power Real-Time Video CODEC for 16-Channel DVR Security System

Seonyoung LEE  Kyeongsoon CHO  

Publication
IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences   Vol.E87-A   No.6   pp.1290-1296
Publication Date: 2004/06/01
Online ISSN: 
DOI: 
Print ISSN: 0916-8508
Type of Manuscript: Special Section PAPER (Special Section on Papers Selected from 2003 International Technical Conference on Circuits/Systems, Computers and Communications (ITC-CSCC 2003))
Category: 
Keyword: 
DVR,  CODEC,  DWT,  video compression,  

Full Text: PDF>>
Buy this Article




Summary: 
This paper presents the architecture and design of the video CODEC circuit that can compress and reconstruct 4:2:2 color VGA video images in real time. Our circuit is based on two-dimensional DWT and inter-frame compression technique. For low-power real-time operation, we modified the traditional Mallat's sub-band coding method to reduce the amount of computation and memory access required in two-dimensional DWT. We also incorporated inter-frame compression technique into our CODEC circuit to enhance the compression capability. To avoid an intensive computation required in motion detection, we encoded only the macro blocks in the current frame which are different from those in the same location of the previous frame to exploit the fact that the background image does not change much in DVR system. We fabricated the CODEC chip using 0.35 µm 3.3 V CMOS standard cell process and applied it to the 16-channel DVR security system.