Gain Improvement of a 2.4-GHz/5-GHz CMOS Low Noise Amplifier by Using High-Resistivity Silicon-on-Insulator Wafers

Junichi KODATE  Mamoru UGAJIN  Tsuneo TSUKAHARA  Takakuni DOUSEKI  Nobuhiko SATO  Takehito OKABE  Kazuaki OHMI  Takao YONEHARA  

Publication
IEICE TRANSACTIONS on Electronics   Vol.E86-C   No.6   pp.1041-1049
Publication Date: 2003/06/01
Online ISSN: 
DOI: 
Print ISSN: 0916-8516
Type of Manuscript: Special Section PAPER (Special Issue on Devices and Circuits for Next Generation Multi-Media Communication Systems)
Category: 
Keyword: 
RFIC,  CMOS,  LNA,  silicon-on-insulator,  SOI,  

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Summary: 
The performance of radio frequency integrated circuits (RFICs) in silicon-on-insulator (SOI) technology can be improved by using a high-resistivity SOI substrate. We investigated the correlation between substrate resistivity and the performance of a low noise amplifier (LNA) on ELTRAN(R) SOI-Epi wafersTM, whose resistivity can be controlled precisely. The use of high-resistivity ELTRAN wafers improves the Q-factor of spiral inductors, and thereby increases the gain and narrows the bandwidth of the LNA. Using the high-resistivity ELTRAN wafers, we have successfully fabricated a 2.4-GHz and 5-GHz CMOS LNA in 0.35-µm SOI CMOS technology, whose process cost is lower than the latest CMOS technologies.