A 10 Gbase Ethernet Transceiver (LAN PHY) in a 1.8 V, 0.18 µm SOI/CMOS Technology

Tsutomu YOSHIMURA  Kimio UEDA  Jun TAKASOH  Harufusa KONDOH  

Publication
IEICE TRANSACTIONS on Electronics   Vol.E86-C   No.4   pp.643-651
Publication Date: 2003/04/01
Online ISSN: 
DOI: 
Print ISSN: 0916-8516
Type of Manuscript: Special Section PAPER (Special Issue on High-Performance, Low-Power System LSIs and Related Technologies)
Category: Design Methods and Implementation
Keyword: 
10 Gb/s Ethernet,  clock and data recovery,  lock detector,  SOI/CMOS process,  

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Summary: 
In this paper, we present a 10 Gbase Ethernet Transceiver that is suitable for 10 Gb/s Ethernet applications. The 10 Gbase Ethernet Transceiver LSI, which contains the high-speed interface and the fully integrated IEEE 802.3ae compliant logics, is fabricated in a 0.18 µm SOI/CMOS process and dissipates 2.9 W at 1.8 V supply. By incorporating the monolithic approach and the use of the advance CMOS process, this 10 GbE transceiver realizes a low power, low cost and compact solution for the exponentially increasing need of broadband network applications.