Reducing Memory System Energy by Software-Controlled On-Chip Memory

Masaaki KONDO  Hiroshi NAKAMURA  

IEICE TRANSACTIONS on Electronics   Vol.E86-C   No.4   pp.580-588
Publication Date: 2003/04/01
Online ISSN: 
Print ISSN: 0916-8516
Type of Manuscript: Special Section PAPER (Special Issue on High-Performance, Low-Power System LSIs and Related Technologies)
Category: Architecture and Algorithms
processor architecture,  cache,  on-chip memory,  way activation,  memory traffic,  

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In recent computer systems, a large portion of energy is consumed by on-chip cache accesses and data movement between cache and off-chip main memory. Reducing these memory system energy is indispensable for future microprocessors because power and thermal issues certainly become a key factor of limiting processor performance. In this paper, we discuss and evaluate how our architecture called SCIMA contributes to energy saving. SCIMA integrates software-controllable memory (SCM) into processor chip. SCIMA can save total memory system energy by using SCM under the support of compiler. The evaluation results reveal that SCIMA can reduce 5-50% of memory system energy and still faster than conventional cache based architecture.