Stress Engineering in Si Based Micro Structures Using Technology Computer-Aided Design

Vincent SENEZ  Aldo ARMIGLIATO  Giovanni CARLOTTI  Gianpietro CARNEVALE  Herve JAOUEN  Ingrid De WOLF  

IEICE TRANSACTIONS on Electronics   Vol.E86-C    No.3    pp.284-294
Publication Date: 2003/03/01
Online ISSN: 
Print ISSN: 0916-8516
Type of Manuscript: Special Section INVITED PAPER (Special Issue on the 2002 IEEE International Conference on Simulation of Semiconductor Processes and Devices (SISPAD'02))
modeling,  stresses,  finite element,  silicon technologies,  front/back end of line,  

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Nowadays, silicon technologies with feature sizes around 100 nm are used in the microelectronics industry to produce gigabits integrated circuits. The prime part of numerical simulation in their development is now well established. One of the purpose of the numerical analyses is the improvement of the mechanical reliability. We synthetize in this paper various works we have performed on the macroscopical modeling and simulation of stress problems and their effects in silicon technologies.