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Numerical Model of ThinFilm Transistors for Circuit Simulation Using Spline Interpolation with Transformation by y=x+log(x)
Mutsumi KIMURA Satoshi INOUE Tatsuya SHIMODA
Publication
IEICE TRANSACTIONS on Electronics
Vol.E86C
No.1
pp.6370 Publication Date: 2003/01/01 Online ISSN:
DOI: Print ISSN: 09168516 Type of Manuscript: PAPER Category: Electromechanical Devices and Components Keyword: model, thinfilm transistor, circuit simulation, spline interpolation, transformation,
Full Text: PDF>>
Summary:
A numerical model of thinfilm transistors for circuit simulation has been developed. This model utilizes three schemes. First, the spline interpolation with transformation by y=x+log(x) achieves excellent preciseness for both oncurrent and offcurrent simultaneously. Second, the square polynomial supplement solves an anomaly near the points where drain voltage equal to zero. Third, the linear extrapolation achieves continuities of the current and its derivatives as a function of voltages out of the area where the spline interpolation is performed, and improves convergence during circuit simulation.

