CMOS Sense-Amplifier Type Flip-Flop Having Improved Setup/Hold Margin

Seong-Ik CHO  Jin-Seok HEO  Hong-June PARK  Mu-Hun PARK  Young-Hee KIM  

IEICE TRANSACTIONS on Electronics   Vol.E86-C   No.12   pp.2508-2510
Publication Date: 2003/12/01
Online ISSN: 
Print ISSN: 0916-8516
Type of Manuscript: LETTER
Category: Integrated Electronics
flip-flop,  sense-amplifier,  receiver,  

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A new CMOS sense-amplifier type flip-flop (SAFF) is proposed. By reducing the discharging time and the loading condition, the setup/hold time is improved by 22%, the input data to clock skew by 46% and the clock to output delay by 4.4%.