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Randomized Caches for Power-Efficiency
Hans VANDIERENDONCK Koen De BOSSCHERE
IEICE TRANSACTIONS on Electronics
Publication Date: 2003/10/01
Print ISSN: 0916-8516
Type of Manuscript: PAPER
Category: Integrated Electronics
embedded processors, data cache, conflict miss, randomization,
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Embedded processors are used in numerous devices executing dedicated applications. This setting makes it worthwhile to optimize the processor to the application it executes, in order to increase its power-efficiency. This paper proposes to enhance direct mapped data caches with automatically tuned randomized set index functions to achieve that goal. We show how randomization functions can be automatically generated and compare them to traditional set-associative caches in terms of performance and energy consumption. A 16 kB randomized direct mapped cache consumes 22% less energy than a 2-way set-associative cache, while it is less than 3% slower. When the randomization function is made configurable (i.e., it can be adapted to the program), the additional reduction of conflicts outweighs the added complexity of the hardware, provided there is a sufficient amount of conflict misses.