Mapping Circuit for Rail-to-Rail Operation

Kawori TAKAKUBO  Hajime TAKAKUBO  Yohei NAGATAKE  Shigetaka TAKAGI  Nobuo FUJII  

IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences   Vol.E86-A   No.2   pp.350-356
Publication Date: 2003/02/01
Online ISSN: 
Print ISSN: 0916-8508
Type of Manuscript: Special Section PAPER (Special Section on Analog Circuit Techniques and Related Topics)
mapping circuit,  input dynamic range,  low power supply,  CMOS voltage subtractor,  rail-to-rail operation,  

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A mapping circuit in order to have a wider input dynamic range is proposed. MOSFET's connecting between power supply lines are employed to construct the mapping circuit. SPICE simulation is shown to evaluate the proposed circuits. With the proposed mapping circuit, two-MOSFET subtractor has a rail-to-rail input voltage. As an application, an OTA consisting of subtractors is realized by employing the proposed mapping circuits to have a rail-to-rail input voltage range.