A High-Speed Binary to Residue Converter Using a Signed-Digit Number Representation

Makoto SYUTO  Eriko SATAKE  Koichi TANNO  Okihiko ISHIZUKA  

Publication
IEICE TRANSACTIONS on Information and Systems   Vol.E85-D   No.5   pp.903-905
Publication Date: 2002/05/01
Online ISSN: 
DOI: 
Print ISSN: 0916-8532
Type of Manuscript: LETTER
Category: VLSI Systems
Keyword: 
residue number system,  signed-digit number representation,  binary to residue converter,  carry-free addition,  

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Summary: 
In this letter, we propose high-speed binary to residue converters for moduli 2n, 2n 1 without using look-up table. For integration of residue arithmetic circuit using a signed-digit (SD) number representation with ordinary binary system, the proposed circuits carry out the efficient conversion. Using SD adders instead of ordinary adders that are used in conventional binary to residue converter, the high-speed conversion without the carry propagation can be achieved. Thus, the proposed converter is independent of the size of modulus and can speed up the binary to residue conversion. On the simulation, the conversion delay times are 1.78 ns for modulus 210-1 and 1.73 ns for modulus 210+1 under the condition of 0.6 µm CMOS technology, respectively. The active area of the proposed converter for moduli 210 1 is 335 µm325 µm.