A 0.6-V Supply, Voltage-Reference Circuit Based on Threshold-Voltage-Summation Architecture in Fully-Depleted CMOS/SOI

Mamoru UGAJIN  Kenji SUZUKI  Tsuneo TSUKAHARA  

Publication
IEICE TRANSACTIONS on Electronics   Vol.E85-C   No.8   pp.1588-1595
Publication Date: 2002/08/01
Online ISSN: 
DOI: 
Print ISSN: 0916-8516
Type of Manuscript: Special Section PAPER (Special Issue on High-Performance Analog Integrated Circuits)
Category: 
Keyword: 
voltage reference,  CMOS,  low voltage,  SOI,  

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Summary: 
A low-voltage silicon-on-insulator (SOI) voltage-reference circuit has been developed. It is based on threshold-voltage-summation architecture and the output is not affected by the input offset of the feedback amplifier. Thus, the output dispersion is considerably reduced. An undoped MOSFET is used as a depletion-mode transistor because of its small threshold voltage. The temperature dependence of normal and undoped MOSFETs in fully depleted CMOS/SOI technology is studied for designing a temperature-insensitive voltage-reference circuit. A prototype circuit, fabricated on a fully depleted CMOS/SIMOX process, has a measured reference voltage of 530 16.8 mV (3σ), and can operate at a supply voltage as low as 0.6 V. The measured temperature coefficient is 0.02 0.06 mV/ (3σ).