A 0.7-V 200-MHz Self-Calibration PLL

Yoshiyuki SHIBAHARA  Masaru KOKUBO  

IEICE TRANSACTIONS on Electronics   Vol.E85-C   No.8   pp.1577-1580
Publication Date: 2002/08/01
Online ISSN: 
Print ISSN: 0916-8516
Type of Manuscript: Special Section PAPER (Special Issue on High-Performance Analog Integrated Circuits)
PLL,  VCO,  calibration,  leakage current,  low voltage,  

Full Text: PDF>>
Buy this Article

Problems concerning a phase-locked loop (PLL) fabricated by a deep-sub-micron process were investigated, and a high-speed self-calibration technique for tuning a voltage-controlled oscillator (VCO) frequency range automatically was developed. The self-calibration technique can measure VCO frequency in short time by comparing intervals between a PLL reference and a VCO output. Furthermore, a loop-filter bypassing method was also used to change the calibration frequency in short time. At 0.7 V and 200 MHz, the prototype PLL has a calibration time of 1.4 µs and a total settling time of 10 µs, which are adequate for microprocessor applications. Moreover, the PLL has a cycle-to-cycle jitter of 142 ps and a power consumption of 470 µW.