Ultra-Shallow Junction Formation with Antimony Implantation

Kentaro SHIBAHARA  

Publication
IEICE TRANSACTIONS on Electronics   Vol.E85-C   No.5   pp.1091-1097
Publication Date: 2002/05/01
Online ISSN: 
DOI: 
Print ISSN: 0916-8516
Type of Manuscript: INVITED PAPER (Special Issue on Advanced Sub-0.1 µm CMOS Devices)
Category: 
Keyword: 
shallow junction,  antimony,  dopant loss,  dopant pile-up,  sheet resistance,  

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Summary: 
Ultra shallow low-resistive junction formation has been investigated for sub-100-nm MOSFETs using antimony implantation. The pileup at the Si/SiO2 interface and the resulting dopant loss during annealing is a common obstacle for antimony and arsenic to reduce junction sheet resistance. Though implanted arsenic gives rise to pileup even with a few seconds duration RTA (Rapid Thermal Annealing), antimony pileup was suppressed with the RTA at relatively low temperature, such as 800 or 900. As a result, low sheet resistance of 260 Ω/sq. was obtained for a 24 nm depth junction with antimony. These results indicate that antimony is superior to arsenic as a dopant for ultra shallow extension formation. However, increase in antimony concentration above 11020 cm-3 gives rise to precipitation and it limits the sheet resistance reduction of the antimony doped junctions. Redistribution behaviors of antimony relating to the pileup and the precipitation are discussed utilizing SIMS (Secondary Ion Mass Spectrometry) depth profiles.