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CMOS Transistor in Nanoscale Era
IEICE TRANSACTIONS on Electronics
Publication Date: 2002/05/01
Print ISSN: 0916-8516
Type of Manuscript: INVITED PAPER (Special Issue on Advanced Sub-0.1 µm CMOS Devices)
CMOS, transistor, integration, semiconductor devices,
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This paper addresses the fundamental challenges and possible solutions in designing and fabricating nanometer-scale CMOS transistor. Essential technology components such as advanced gate dielectrics, ultra-shallow junction, channel dopant profile engineering, and salicide are discussed. Ultra-scaled transistor with physical gate length down to 15 nm is demonstrated as a continued effort to push the traditional planar CMOS technology towards its physical limit.