Design of Small RSFQ Microprocessor Based on Cell-Based Top-Down Design Methodology

Futabako MATSUZAKI  Kenichi YODA  Junichi KOSHIYAMA  Kei MOTOORI  Nobuyuki YOSHIKAWA  

Publication
IEICE TRANSACTIONS on Electronics   Vol.E85-C   No.3   pp.659-664
Publication Date: 2002/03/01
Online ISSN: 
DOI: 
Print ISSN: 0916-8516
Type of Manuscript: Special Section PAPER (Special Issue on Superconductive Electronics)
Category: Digital Devices and Their Applications
Keyword: 
SFQ,  BDD,  superconducting circuit,  microprocessor,  standard cell,  

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Summary: 
We have proposed a top-down design methodology for the RSFQ logic circuits based on the Binary Decision Diagram (BDD). In order to show the effectiveness of the methodology, we have designed a small RSFQ microprocessor based on simple architecture. We have compared the performance of the 8-bit RSFQ microprocessor with its CMOS version. It was found that the RSFQ system is superior in terms of the operating speed though it requires extremely large area. We have also implemented and tested a 1-bit ALU that is one of the important components of the microprocessor and confirmed its correct operation.