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CMOS Charge Pumps Using Cross-Coupled Charge Transfer Switches with Improved Voltage Pumping Gain and Low Gate-Oxide Stress for Low-Voltage Memory Circuits
Kyeong-Sik MIN Jin-Hong AHN
IEICE TRANSACTIONS on Electronics
Publication Date: 2002/01/01
Print ISSN: 0916-8516
Type of Manuscript: LETTER
Category: Electronic Circuits
charge pump, low voltage, memory circuit, low gate-oxide stress,
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To overcome the problems of the modified Dickson pump like NCP-2, another pump (CCTS-1) where simple voltage doublers are cascaded in series and each of them has cross-coupled configuration is studied in this letter for possible use in low-voltage EEPROMs and DRAMs. Though this concept of cascading doublers has been previously proposed, it is firstly addressed in this letter that CCTS-1 has lower gate-oxide stress, improved voltage pumping gain, and better power efficiency than NCP-2 so that CCTS-1 can be more suitable for multi-stage pump in particular at low VCC. In addition, CCTS-2 is proposed to overcome the degraded body-effect of CCTS-1 without using boosted clocks when the stage number is large.