Implementation of a High-Performance Genetic Algorithm Processor for Hardware Optimization

Jinjung KIM  Yunho CHOI  Chongho LEE  Duckjin CHUNG  

Publication
IEICE TRANSACTIONS on Electronics   Vol.E85-C   No.1   pp.195-203
Publication Date: 2002/01/01
Online ISSN: 
DOI: 
Print ISSN: 0916-8516
Type of Manuscript: PAPER
Category: Electronic Circuits
Keyword: 
genetic algorithm (GA),  FPGA,  optimization,  

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Summary: 
In this paper, a hardware-oriented Genetic Algorithm (GA) was proposed in order to save the hardware resources and to reduce the execution time of GAP. Based on steady-state model among continuous generation model, the proposed GA used modified tournament selection, as well as special survival condition, with replaced whenever the offspring's fitness is better than worse-fit parent's. The proposed algorithm shows more than 30% in convergence speed over the conventional algorithm. Finally, by employing the efficient pipeline parallelization and handshaking protocol in proposed GAP, above 30% of the computation speed-up can be achieved over survival-based GA which runs one million crossovers per second (1 MHz), when device speed and size of application are taken into account on prototype. It would be used for high speed processing such of central processor of evolvable hardware, robot control and many optimization problems.