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Real-Time Multiprocessing System for Space-Time Equalizer in High Data Rate TDMA Mobile Wireless Communications
Takeshi TODA Masaaki FUJII
IEICE TRANSACTIONS on Communications
Publication Date: 2002/12/01
Print ISSN: 0916-8516
Type of Manuscript: Special Section PAPER (Special Issue on Software Defined Radio Technology and Its Applications)
antenna array, multiprocessing, real-time operating system (RTOS), sequence estimation, space-time equalizer,
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A new approach to build up a real-time multiprocessing system that is configuration flexible for evaluating space-time (ST) equalizers is described. The core of the system consists of fully programmable devices such as digital signal processors (DSPs), field-programmable gate arrays (FPGAs), and reduced instruction set computers (RISCs) with a real-time operating system (RTOS). The RTOS facilitates flexibility in the multi-processor configuration for the system conforming with ST processing algorithms. Timing jitter synchronization caused by use of the RTOS-embedded system is shown, and an adjustable frame format for a transmission system is described as a measure to avoid the jitter problem. Bit error rate (BER) performances measured in uncorrelated frequency-selective fading channels show that an ST equalizer provides a significantly lower BER than an array processor does.