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A 1-V 2-GHz RF Receiver with 49 dB of Image Rejection in CMOS/SIMOX
Mamoru UGAJIN Junichi KODATE Tsuneo TSUKAHARA
IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2002/02/01
Print ISSN: 0916-8508
Type of Manuscript: Special Section PAPER (Special Section on Analog Circuit Techniques and Related Topics)
image rejection, CMOS, low voltage, SOI, RF,
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A 1-V 2-GHz receiver that exhibits an image rejection of 49 dB is described. It consists of a low-noise amplifier, a quadrature mixer and on-chip polyphase filters, and was fabricated by 0.2-µm fully depleted CMOS/SIMOX technology. The quadrature mixer employs an LC-tuned folded structure with a common RF input for I and Q channels. This enables 1-V operation, suppresses phase errors in LO signals, and improves the image-rejection performance by about 15-dB compared to a conventional quadrature architecture. The current source of the single-to-balance converter at the mixer input consists of a transistor and an LC tank in a cascode configuration. This enhances its output impedance and improves its common-mode-rejection ratio (CMRR) and the IIP2 characteristics of the receiver. The chip consumes 12 mW with 1-V power supply. The receiver provides an NF of 10 dB with an IIP3 of -15.8 dBm and IIP2 of 12.3 dBm.