A 2-GHz Down-Converter with 3-dB Bandwidth of 600 MHz Using LO Signal Suppressing Output Buffer

Osamu WATANABE  Takafumi YAMAJI  Tetsuro ITAKURA  Ichiro HATTORI  

IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences   Vol.E85-A   No.2   pp.286-292
Publication Date: 2002/02/01
Online ISSN: 
Print ISSN: 0916-8508
Type of Manuscript: Special Section PAPER (Special Section on Analog Circuit Techniques and Related Topics)
analog signal processing,  integrated circuit,  down-converter,  

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A 2-GHz down-converter for wide-band wireless communication systems is described. To achieve both wide-band output characteristic and LO signal suppression, an on-chip LC series resonator which is resonated at LO signal frequency and a transimpedance amplifier which is used in the output buffer circuit are used. To achieve a low sensitivity to temperature, two kinds of bias circuits; a VT reference current source and a bandgap reference current source are used. The measured 3-dB bandwidth of 600 MHz is achieved. The conversion gain varies less than 0.2 dB within 200 MHz 10 MHz and 400 MHz 10 MHz band and 0.7 dB for the temperature range from -34 to 85. At room temperature, conversion gain of 15 dB, NF of 9.5 dB and IIP3 of -5 dBm are obtained respectively. The down-converter is fabricated using Si BiCMOS process with ft=20 GHz, and it occupies approximately 1 mm2.