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A High Assurance On-Line Recovery Technology for a Space On-Board Computer
Hiroyuki YASHIRO Teruo FUJIWARA Kinji MORI
IEICE TRANSACTIONS on Information and Systems
Publication Date: 2001/10/01
Print ISSN: 0916-8532
Type of Manuscript: Special Section PAPER (IEICE/IEEE Joint Special Issue on Autonomous Decentralized Systems and Systems' Assurance)
GN&C, autonomous, general-purpose, assurance, fault tolerance,
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A high assurance on-line recovery technology for a space on-board computer that can be realized using commercial devices is proposed whereby a faulty processor node confirms its normality and then recovers without affecting the other processor nodes in operation. Also, the result of an evaluation test using the breadboard model implementing this technology is reported. Because this technology enables simple and assured recovery of a faulty processor node regardless of its degree of redundancy, it can be applied to various applications, such as a launch vehicle, a satellite, and a reusable launch vehicle. As a result, decreasing the cost of an on-board computer is possible while maintaining its high reliability.