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A Simplified Process Modeling for Reverse Short Channel Effect of Threshold Voltage of MOSFET
Hirokazu HAYASHI Noriyuki MIURA Hirotaka KOMATSUBARA Koichi FUKUDA
IEICE TRANSACTIONS on Electronics
Publication Date: 2001/09/01
Print ISSN: 0916-8516
Type of Manuscript: PAPER
Category: Semiconductor Materials and Devices
RSCE, simple model, dopant pile-up, threshold voltage,
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We propose an effective model that can reproduce the reverse short channel effect (RSCE) of the threshold voltage (Vth) of MOSFETs using a conventional process simulator that solves one equation for each impurity. The proposed model is developed for local modeling which is effective within the limited process conditions. The proposed model involves the physics in which RSCE is due to the pile up of channel dopant at the Si/SiO2 interface. We also report the application to actual device design using our model. The calculation cost is much lower than for a pair diffusion model, and device design in an acceptable turn around time is possible.