Strained-Si-on-Insulator (Strained-SOI) MOSFETs--Concept, Structures and Device Characteristics

Shin-ichi TAKAGI  Tomohisa MIZUNO  Naoharu SUGIYAMA  Tsutomu TEZUKA  Atsushi KUROBE  

Publication
IEICE TRANSACTIONS on Electronics   Vol.E84-C   No.8   pp.1043-1050
Publication Date: 2001/08/01
Online ISSN: 
DOI: 
Print ISSN: 0916-8516
Type of Manuscript: INVITED PAPER (Special Issue on Silicon Nanodevices)
Category: 
Keyword: 
CMOS,  SOI,  mobility,  strain,  SiGe,  

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Summary: 
An effective way to realize scaled CMOS with both requirements of high current drive and low supply voltage is to introduce high mobility channel such as strained Si. This paper proposes a new device structure using the strained-Si channel, strained-Si-on-Insulator (strained-SOI) MOSFET, applicable to sub-100 nm Si CMOS technology nodes. The device structure and the advantages of strained-SOI MOSFETs are presented. It is demonstrated that strained-SOI MOSFETs are successfully fabricated by combining SIMOX technology with re-growth of strained Si and that n- and p-MOSFETs have mobility of 1.6 and 1.3 times higher than the universal one, respectively. Furthermore, it is also shown that ultra-thin SiGe-on-Insulator (SGOI) virtual substrates with higher Ge content, necessary to further increase mobility and to realize fully-depleted SOI MOSFETs, can be made by oxidation of SGOI structure with lower Ge content.