Si Substrate Resistivity Design for On-Chip Matching Circuit Based on Electro-Magnetic Simulation

Masayoshi ONO  Noriharu SUEMATSU  Shunji KUBO  Kensuke NAKAJIMA  Yoshitada IYAMA  Tadashi TAKAGI  Osami ISHIDA  

IEICE TRANSACTIONS on Electronics   Vol.E84-C    No.7    pp.923-930
Publication Date: 2001/07/01
Online ISSN: 
Print ISSN: 0916-8516
Type of Manuscript: Special Section PAPER (Special Issue on Techniques for Constructing Microwave Simulators--Design and Analysis Tools for Electromagnetic Fields, Circuits, and Antennas--)
Category: Electromagnetics Simulation Techniques
Si-MMIC,  electromagnetic simulation,  high resistivity Si substrate,  low noise amplifier,  spiral inductor,  

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For on-chip matching Si-MMIC fabricated on a conventional low resistivity Si substrate, the loss of on-chip inductors is quite high due to the dielectric loss of the substrate. In order to reduce the loss of on-chip matching circuit, the use of high resistivity Si substrate is quite effective. By using electro-magnetic simulation, the relationship between coplanar waveguide (CPW) transmission line characteristics and the resistivity of Si substrate is discussed. Based on the simulated results, the resistivity of Si substrate is designed to achieve lower dielectric loss than conductor loss. The effectiveness of high resistivity Si substrate is evaluated by the extraction of equivalent circuit model parameters of the fabricated on-chip spiral inductors and the measurement of the fabricated on-chip matching Si-MMIC LNA's.