Highly-Parallel Stereo Vision VLSI Processor Based on an Optimal Parallel Memory Access Scheme

Masanori HARIYAMA  Seunghwan LEE  Michitaka KAMEYAMA  

IEICE TRANSACTIONS on Electronics   Vol.E84-C   No.3   pp.382-389
Publication Date: 2001/03/01
Online ISSN: 
Print ISSN: 0916-8516
Type of Manuscript: PAPER
Category: Integrated Electronics
motion stereo,  memory allocation,  functional-unit allocation,  

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In a real-time vision system, parallel memory access is essential for highly parallel image processing. The use of multiple memory modules is one efficient technique for parallel access. In the technique, data stored in different memory modules can be accessed in parallel. This paper presents an optimal memory allocation methodology to map data to be read in parallel onto different memory modules. Based on the methodology, a high-performance VLSI processor for three-dimensional instrumentation is proposed.