A CMOS DC Voltage Doubler with Nonoverlapping Switching Control

Shi-Ho KIM
Jorgo TSOUHLARAKIS
Jan Van HOUDT
Herman MAES

Publication
IEICE TRANSACTIONS on Electronics   Vol.E84-C    No.2    pp.274-277
Publication Date: 2001/02/01
Online ISSN: 
DOI: 
Print ISSN: 0916-8516
Type of Manuscript: LETTER
Category: Electronic Circuits
Keyword: 
charge pump,  voltage doubler,  word line driver,  dynamic loss,  power efficiency,  

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Summary: 
A new CMOS DC voltage doubler with nonoverlapping switching control is proposed, in order to eliminate the dynamic current loss during switching as well as the threshold voltage drop of the serial switches. The simulated results at 1.5 V show that the maximum power efficiency is improved with about 30%, whereas the efficiency in the low output current region is larger than 5 times compared to the conventional voltage doublers. This proposed CMOS DC voltage doubler can be used as a VPP generator of low voltage DRAM's.