A Single-Chip MPEG-2 422P@ML Video, Audio, and System Encoder with a 162 MHz Media-Processor Core and Dual Motion Estimation Cores

Tetsuya MATSUMURA  Satoshi KUMAKI  Hiroshi SEGAWA  Kazuya ISHIHARA  Atsuo HANAMI  Yoshinori MATSUURA  Stefan SCOTZNIOVSKY  Hidehiro TAKATA  Akira YAMADA  Shu MURAYAMA  Tetsuro WADA  Hideo OHIRA  Toshiaki SHIMADA  Ken-ichi ASANO  Toyohiko YOSHIDA  Masahiko YOSHIMOTO  Koji TSUCHIHASHI  Yasutaka HORIBA  

Publication
IEICE TRANSACTIONS on Electronics   Vol.E84-C   No.1   pp.108-122
Publication Date: 2001/01/01
Online ISSN: 
DOI: 
Print ISSN: 0916-8516
Type of Manuscript: PAPER
Category: Integrated Electronics
Keyword: 
video encoder,  MPEG-2,  media-processor,  audio encoder,  system encoder,  motion estimation,  

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Summary: 
A single-chip MPEG-2 video, audio, and system encoder LSI has been developed. It performs concurrent real-time processing of MPEG-2 422P@ML video encoding, 2-channel Dolby Digital or MPEG-1 audio encoding, and system encoding that generates a multiplexed transport stream (TS) or a program stream (PS). Advanced hybrid architecture, which combines a high performance VLIW media-processor D30V and hardwired video processing circuits, has been adopted to satisfy the demands of both high flexibility and enormous computational capability. A unified control scheme has been newly proposed that hierarchically manages adaptive task priority control over asynchronous video, audio, and system encoding processes in order to achieve real-time concurrent processing using a single D30V. Dual dedicated motion estimation cores consisting of a coarse ME core (CME) for wide range searches and a fine ME core (FME) for precise searches have been integrated to produce high picture quality while using a small amount of hardware. Adopting these features, a single-chip encoder has been fabricated using 0.25-micron 4-layer metal CMOS technology, and integrated into a 14.2 mm 14.2 mm die with 11 million transistors.