Fabrication and Characterization of InGaAs/InAlAs Insulated Gate Pseudomorphic HEMTs Having a Silicon Interface Control Layer

Yong-Gui XIE  Seiya KASAI  Hiroshi TAKAHASHI  Chao JIANG  Hideki HASEGAWA  

IEICE TRANSACTIONS on Electronics   Vol.E84-C   No.10   pp.1335-1343
Publication Date: 2001/10/01
Online ISSN: 
Print ISSN: 0916-8516
Type of Manuscript: Special Section PAPER (Joint Special Issue on Heterostructure Microelectronics with TWHM 2000 (Topical Workshop on Heterostructure Microelectronics 2000))
Category: Hetero-FETs & Their Integrated Circuits
insulated gate,  PHEMT,  InGaAs,  interface control,  Fermi level pinning,  

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A novel InGaAs/InAlAs insulated gate (IG) pseudomorphic high electron mobility transistor (PHEMT) having a silicon interface control layer (Si ICL) is successfully fabricated and characterized. Systematic efforts to characterize and optimize the insulated gate structure and the PHEMT fabrication process were made by using in-situ X-ray photoelectron spectroscopy (XPS) and capacitance-voltage (C-V) techniques. This led to successful fabrication of a novel IG-PHEMT showing excellent stable DC characteristics with a good pinch off and a high transconductance (177 mS/mm), very small gate leakage currents, very high gate breakdown voltages (about 40 V) and respectable RF characteristics fT = 9 GHz and fmax=38 GHz.