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Device Linearity and Gate Voltage Swing Improvement by Al0.3Ga0.7As/In0.15Ga0.85As Double Doped-Channel Design
Feng-Tso CHIEN Hsien-Chin CHIU Shih-Cheng YANG Chii-Wen CHEN Yi-Jen CHAN
IEICE TRANSACTIONS on Electronics
Publication Date: 2001/10/01
Print ISSN: 0916-8516
Type of Manuscript: Special Section PAPER (Joint Special Issue on Heterostructure Microelectronics with TWHM 2000 (Topical Workshop on Heterostructure Microelectronics 2000))
Category: Hetero-FETs & Their Integrated Circuits
doped-channel EFTs, Al0.3Ga0.7As/In0.15Ga0.85As, device linearity,
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Devices DC, RF, and microwave power performances between Al0.3Ga0.7As/In0.15Ga0.85As double doped-channel FET (D-DCFETs), conventional doped-channel FETs (DCFETs) and HEMTs are compared with each other. Device linearity and power performance have been improved by a double doped-channel design. The D-DCFETs provides a higher current density, higher gate breakdown voltage, and improves gate operation bias range as well as frequency performance. The linear power gain and output power for D-DCFETs is 19 dB and 305 mW/mm with a power-added efficiency of 52% at Vds = 2.5 V under a 1.9 GHz operation. These advantages suggest that double doped-channel design is more suitable for a high linearity and high microwave power device applications.