Synthesis for Multiple Input Wire Replacement of a Gate: Theorems and Applications

Shih-Chieh CHANG  Zhong-Zhen WU  Sheng-Hong TU  

IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences   Vol.E84-A   No.12   pp.3116-3124
Publication Date: 2001/12/01
Online ISSN: 
Print ISSN: 0916-8508
Type of Manuscript: PAPER
Category: VLSI Design Technology and CAD
logic synthesis,  redundant wire,  alternative wire,  mandatory assignment,  layout synthesis,  

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The single wire replacement attempts to replace a target wire by another wire without changing the circuit functionality. Due to the large searching space required, there is very little success in directly extending the single wire replacement technique to replace multiple wires at the same time. The objective in this paper is to propose a new logic transformation, called the alternative node (Alnode) technique, which attempts to replace multiple wires at a time. Basically, the transformation simultaneously replaces multiple input wires of a gate by a new set of input wires. To accomplish the transformation, we propose several speedup theorems for replacing multiple wires. In this paper, we also demonstrate that the Alnode technique can be applied to achieve power reduction for domino logic and wire length minimization in layouts. The experimental results are encouraging.