Advanced Process/Device Modeling and Its Impact on the CMOS Design Solution

Shigetaka KUMASHIRO  

IEICE TRANSACTIONS on Electronics   Vol.E83-C   No.8   pp.1281-1287
Publication Date: 2000/08/25
Online ISSN: 
Print ISSN: 0916-8516
Type of Manuscript: INVITED PAPER (Special Issue on 1999 International Conference on Simulation of Semiconductor Processes and Devices (SISPAD'99))
Category: Simulation Methodology and Environment
process modeling,  device modeling,  0.13 [µm] CMOS,  

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This paper reports the application results of the state-of-the-art advanced process/device modeling to the 0.13 [µm] CMOS design solution. It has been demonstrated that the S/D-extension junction depth, the well profile, the channel profile and the drive current of the 0.13 [µm] CMOS can be predicted with reasonable accuracy. Further model improvement is required to predict the ΔL and the Vt-Lg characteristics of the devices with the tilted pocket I/I more accurately. It is quite beneficial to construct several design maps by using the state-of-the-art advanced TCAD in a 'carpet bombing' way in the early stage of the development of new generation CMOS.