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Energy-Reduction Effect of Ultralow-Voltage MTCMOS/SIMOX Circuits Using a Graph with Equispeed and Equienergy Lines
Takakuni DOUSEKI Toshishige SHIMAMURA Koji FUJII Junzo YAMADA
IEICE TRANSACTIONS on Electronics
Publication Date: 2000/02/25
Print ISSN: 0916-8516
Type of Manuscript: Special Section PAPER (Special Issue on Low-Power High-Speed CMOS LSI Technologies)
ultralow-voltage circuit, multi-threshold CMOS, SIMOX, SOI,
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This paper describes the effect of lowering the supply voltage and threshold voltages on the energy reduction of an ultralow-voltage multi-threshold CMOS/SIMOX (MTCMOS/SIMOX) circuit. The energy dissipation is evaluated using a graph with equispeed and equienergy lines on a supply voltage and a threshold voltage plane. In order to draw equispeed and equienergy lines for ultralow-voltage circuits, we propose a modified energy-evaluation model taking into account a input-waveform transition-time of the circuits. The validity of the proposed energy-evaluation model is confirmed by the evaluation of a gate-chain TEG and a 16-bit CLA adder fabricated with 0.25-µm MTCMOS/SIMOX technology. Using the modified model, the energy-reduction effect in lowering the supply voltage is evaluated for a single-Vth fully-depleted CMOS/SOI circuit, a dual-Vth CMOS circuit consisting of fully-depleted low- and medium-Vth MOSFETs, and a triple-Vth MTCMOS/SIMOX circuit. The evaluation reveals that lowering the supply voltage of the MTCMOS/SIMOX circuit to 0.5 V is advantageous for the energy reduction at a constant operating speed.