delay product, and phase margin were measured as a function of supply voltage VD. The dissipation was almost proportional to VD for VD up to 1.2 V. The "1P0P" D-FF consumed only 2.03 mW at a clock frequency of 5.17 GHz (i.e., at a data rate of 5.17 Gbps) and a VD of 0.6 V, so the power delay product was 0.196 pJ. For a (29-1) pseudo-random signal, a maximum frequency of 7.15 GHz was obtained at a VD of 1.1 V, with dissipation of 6.02 mW and an error rate of less than 10-9. Clear, wide eye openings were obtained at frequencies up to 7.15 GHz. A sufficiently high phase margin of 180 was obtained with a data rate of 5 Gbps at a VD of 0.6 V." />


Low-Voltage, Low-Power, High-Speed 0.25-µm GaAs HEMT Delay Flip-Flops

Tadayoshi ENOMOTO  Atsunori HIROBE  Masahiro FUJII  Nobuhide YOSHIDA  Shuji ASAI  

Publication
IEICE TRANSACTIONS on Electronics   Vol.E83-C   No.11   pp.1776-1787
Publication Date: 2000/11/25
Online ISSN: 
DOI: 
Print ISSN: 0916-8516
Type of Manuscript: PAPER
Category: Integrated Electronics
Keyword: 
GaAs,  HEMT,  delay latch,  delay flip-flop,  power dissipation,  

Full Text: PDF>>
Buy this Article




Summary: 
Four different types of GaAs HEMT DCFL static delay latches based on NOR gates were developed. Eight different types of low-voltage, low-power, high-speed delay flip-flops (D-FFs) were constructed using two delay latches of different types. These delay latches and D-FFs were designed using 0.25-µm n-AlGaAs/i-InGaAs HEMT technology, and their characteristics were evaluated by SPICE simulation. A positive-edge D-FF, called "1P0P," was fabricated and tested. Its operating clock frequency, power dissipation, power delay product, and phase margin were measured as a function of supply voltage VD. The dissipation was almost proportional to VD for VD up to 1.2 V. The "1P0P" D-FF consumed only 2.03 mW at a clock frequency of 5.17 GHz (i.e., at a data rate of 5.17 Gbps) and a VD of 0.6 V, so the power delay product was 0.196 pJ. For a (29-1) pseudo-random signal, a maximum frequency of 7.15 GHz was obtained at a VD of 1.1 V, with dissipation of 6.02 mW and an error rate of less than 10-9. Clear, wide eye openings were obtained at frequencies up to 7.15 GHz. A sufficiently high phase margin of 180 was obtained with a data rate of 5 Gbps at a VD of 0.6 V.