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Random Modulation: Multi-Threshold-Voltage Design Methodology in Sub-2-V Power Supply CMOS
Naoki KATO Yohei AKITA Mitsuru HIRAKI Takeo YAMASHITA Teruhisa SHIMIZU Fuyuhiko MAKI Kazuo YANO
IEICE TRANSACTIONS on Electronics
Publication Date: 2000/11/25
Print ISSN: 0916-8516
Type of Manuscript: Special Section PAPER (Special Issue on Low-power LSIs and Technologies)
CMOS, threshold voltage, leakage current, low power,
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Random modulation refers to the changing of the MOSFET threshold voltage cell by cell. This paper claims it is essential in sub-2-V CMOS design because it reduces the sub-threshold leakage current even in the active and sleep modes as well as in the stand-by mode. We found that a gradated modulation scheme, which gradually changes the ratio of low- Vth cells according to the path-delay, is the best approach. To achieve the minimal leakage current, the way of determining the optimum pair of threshold voltages is also described. Experimental results for microprocessor show that gradated modulation reduces sub-threshold leakage current by 75% to 90% compared to conventional single-low-threshold voltage design without degrading the performance of the circuits.