Variable Threshold-Voltage CMOS Technology

Tadahiro KURODA  Tetsuya FUJITA  Fumitoshi HATORI  Takayasu SAKURAI  

IEICE TRANSACTIONS on Electronics   Vol.E83-C   No.11   pp.1705-1715
Publication Date: 2000/11/25
Online ISSN: 
Print ISSN: 0916-8516
Type of Manuscript: INVITED PAPER (Special Issue on Low-power LSIs and Technologies)
low power CMOS design,  low voltage,  threshold voltage,  substrate bias,  

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This paper describes a Variable Threshold-voltage CMOS technology (VTCMOS) which controls the threshold voltage (VTH) by means of substrate bias control. Circuit techniques to combine a switch circuit for an active mode and a pump circuit for a standby mode are presented. Design considerations, such as latch-up immunity and upper limit of reverse substrate bias, are discussed. Experimental results obtained from chips fabricated in a 0.3 µm VTCMOS technology are reported. VTH controllability including temperature dependence and influence on short channel effect, power penalty caused by the control circuit, substrate current dependence at low VTH, and substrate noise influence on circuit performance are investigated. A scaling theory is also presented for use in the discussion of future possibilities and problems involved in this technology.