X32 + X2 + X + 1 is newly designed for high-speed 32 or 64 bit parallel calculation and frame wise SECDED (Single Error Correction, Double Error Detection). IOG is applicable to long haul transmission of IP datagrams in Internet backbone and to inter-chip or inter-module transmission of IP datagrams in parallel IP routers." />
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IOG: A Protocol for IP over Glass
Masataka OHTA Hideaki OONAKA Kazuyuki SATO Shinichi AOKI Shigeyuki TAKAYAMA Akio IIJIMA
IEICE TRANSACTIONS on Communications
Publication Date: 2000/10/25
Print ISSN: 0916-8516
Type of Manuscript: Special Section PAPER (Special Issue on Advanced Internetworking based on Photonic Network Technologies)
internet, optical fiber, WDM,
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IOG is a link layer protocol specifically designed for the high speed and bandwidth efficient transmission of IPv4 and IPv6 datagrams over optical fibers. That is, IOG is a simple point-to-point packetization protocol over a bit stream with a low bit error rate. MTU of IOG is 1535, which is long enough for the Internet with IPv6 multicast packets and Ethernet frames. IOG has a framing structure of fixed length (2048 bytes) for synchronization, CRCC (Cyclic Redundancy Check Code) and scrambling. A frame consists of 4 bytes of a frame header, 2040 bytes of a frame payload and 4 bytes of a frame trailer for CRCC. CRCC is also used for scrambling. A frame header consists of a 21 bit flag sequence ("011111111111111111110") and a 11 bit packet boundary pointer. A packet has an 11 bit length field and a 21 bit label field. The label field contains an Ethertype or a link layer label. Packets are packed continuously in frame payload. A packet is at least 20 and at most 1535 bytes long. If there are no packets to send, 20 byte packets of Ethertype 0 are sent, which is ignored by the receiver. A packet may be included in two adjacent frames. The packet boundary pointer in a frame header of a frame points to the first packet boundary of the frame, which means that once a frame synchronization is established, packet synchronization is also established. IOG is designed to allow high-speed implementations to enable 32 or 64 bit parallel processing. CRC polynomial of X32 + X2 + X + 1 is newly designed for high-speed 32 or 64 bit parallel calculation and frame wise SECDED (Single Error Correction, Double Error Detection). IOG is applicable to long haul transmission of IP datagrams in Internet backbone and to inter-chip or inter-module transmission of IP datagrams in parallel IP routers.