A Delay Locked Loop Circuit with Mixed Mode Phase Tuning Technique

Yeo-San SONG  Jin-Ku KANG  Kwang Sub YOON  

IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences   Vol.E83-A   No.9   pp.1860-1861
Publication Date: 2000/09/25
Online ISSN: 
Print ISSN: 0916-8508
Type of Manuscript: LETTER
Category: Analog Signal Processing
mixed-mode circuit,  DLL,  Jitter,  

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This paper describes a DLL (Delay Locked Loop) circuit with the mixed-mode phase tuning method. The circuit accomplishes unlimited phase shift and accurate phase alignment through the coarse and fine phase tuning technique. It is based on a dual delay locked loop structure. The main loop is for generating coarsely spaced clocks and the second loop is for fast and accurate phase tuning with digital and analog phase detection. Simulations show that this circuit has 360 degree phase shift capability and can resolve 10 ps phase error using 0.6 µm CMOS technology.