Dynamic Power Dissipation of Track/Hold Circuit

Hiroyuki SATO  Haruo KOBAYASHI  

IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences   Vol.E83-A   No.8   pp.1728-1731
Publication Date: 2000/08/25
Online ISSN: 
Print ISSN: 0916-8508
Type of Manuscript: LETTER
Category: Analog Signal Processing
track/hold circuit,  sampling,  dynamic power dissipation,  low power circuit design,  

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This paper describes the formula for dynamic power dissipation of a track/hold circuit as a function of the input frequency, the input amplitude, the sampling frequency, the track/hold duty cycle, the power supply voltage and the hold capacitance for a sinusoidal input.