An Architectural Study of an MPEG-2 422P@HL Encoder Chip Set

Ayako HARADA
Shin-ichi HATTORI
Tadashi KASEZAWA
Hidenori SATO
Tetsuya MATSUMURA
Satoshi KUMAKI
Kazuya ISHIHARA
Hiroshi SEGAWA
Atsuo HANAMI
Yoshinori MATSUURA
Ken-ichi ASANO
Toyohiko YOSHIDA
Masahiko YOSHIMOTO
Tokumichi MURAKAMI

Publication
IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences   Vol.E83-A    No.8    pp.1614-1623
Publication Date: 2000/08/25
Online ISSN: 
DOI: 
Print ISSN: 0916-8508
Type of Manuscript: Special Section PAPER (Special Section on Digital Signal Processing)
Category: Implementations of Signal Processing Systems
Keyword: 
video compression,  video encoder,  MPEG-2,  HDTV,  motion estimation,  

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Summary: 
An MPEG-2 422P@HL encoder chip set composed of a preprocessing LSI, an encoding LSI, and a motion estimation LSI is described. This chip set realizes a two-type scalability of picture resolution and quality, and executes a hierarchical coding control in the overall encoder system. Due to its scalable architecture, the chip set realizes a 422P@HL video encoder with multi-chip configuration. This single encoding LSI achieves 422P@ML video, audio, and system encoding in real time. It employs an advanced hybrid architecture with a 162 MHz media processor and dedicated video processing hardware. It also has dual communication ports for parallel processing with multi-chip configuration. Transferring of reconstructed data and macroblock characteristic data between neighboring encoder modules is executed via these ports. The preprocessing LSI is fabricated using 0.25 micron three-layer metal CMOS technology and integrates 560 K gates in an area of 12.0 mm 12.0 mm . The encoding LSI is fabricated using 0.25 micron four-layer metal CMOS technology and integrates 11 million transistors in an area of 14.2 mm 14.2 mm . The motion estimation LSI is fabricated using 0.35 micron three-layer metal CMOS technology. It integrates 1.9 million transistors in an area of 8.5 mm 8.5 mm . This chip set makes various system configurations possible and allows for a compact and cost-effective video encoder with high picture quality.