For Full-Text PDF, please login, if you are a member of IEICE,|
or go to Pay Per View on menu list, if you are a nonmember of IEICE.
CORDIC-Based Direct Digital Frequency Synthesizer: Comparison with a ROM-Based Architecture in FPGA Implementation
Minkyoung PARK Kiseon KIM Jeong-A LEE
IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2000/06/25
Print ISSN: 0916-8508
Type of Manuscript: LETTER
Category: Digital Signal Processing
CORDIC, DDFS (Direct Digital Frequency Synthesizer), sine generation, FPGA,
Full Text: PDF(276.2KB)>>
This paper describes a CORDIC-based direct digital frequency synthesizer in comparison with a ROM-based architecture. To optimize the hardware design parameters, we perform numerical analysis of the quantization effects for ROM and CORDIC-based architectures. The hardware costs of them are estimated in FPGA, which shows that the CORDIC-based architecture becomes better than the ROM-based when the required accuracy is 9 bits or more.