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The Influence of Stud Bumping above the MOSFETs on Device Reliability
Nobuhiro SHIMOYAMA Katsuyuki MACHIDA Masakazu SHIMAYA Hideo AKIYA Hakaru KYURAGI
IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2000/05/25
Print ISSN: 0916-8508
Type of Manuscript: Special Section PAPER (Special Section on Reliability Theory and Its Applications)
stud bump, stress, interface traps, hot carrier, annealing,
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This paper presents the effect of stress on device degradation in metal-oxide-semiconductor field-effect transistors (MOSFETs) due to stud bumping. Stud bumping above the MOSFET region generates interface traps at the Si/SiO2 interface and results in the degradation of transconductance in N-channel MOSFETs. The interface traps are apparently eliminated by both nitrogen and hydrogen annealing. However, the hot-carrier immunity after hydrogen annealing is one order of magnitude stronger than that after nitrogen annealing. This effect is explained by the termination of dangling bonds with hydrogen atoms.