For Full-Text PDF, please login, if you are a member of IEICE,|
or go to Pay Per View on menu list, if you are a nonmember of IEICE.
Neuron-MOS Current Mirror Circuit and Its Application to Multi-Valued Logic
Jing SHEN Koichi TANNO Okihiko ISHIZUKA Zheng TANG
IEICE TRANSACTIONS on Information and Systems
Publication Date: 1999/05/25
Print ISSN: 0916-8532
Type of Manuscript: Special Section PAPER (Special Issue on Multiple-Valued Logic and Its Applications)
neuron MOS transistor, multi-valued logic, current-mode circuit, current mirror, current comparator, threshold detector, T-gate, integrated circuit,
Full Text: PDF>>
A neuron-MOS transistor (νMOS) is applied to current-mode multi-valued logic (MVL) circuits. First, a novel low-voltage and low-power νMOS current mirror is presented. Then, a threshold detector and a quaternary T-gate using the proposed νMOS current mirrors are proposed. The minimum output voltage of the νMOS current mirror is decreased by VT (threshold voltage), compared with the conventional double cascode current mirror. The νMOS threshold detector is built on a νMOS current comparator originally composed of νMOS current mirrors. It has a high output swing and sharp transfer characteristics. The gradient of the proposed comparator output in the transfer region can be increased 6.3-fold compared with that in the conventional comparator. Along with improved operation of the novel current comparator, the discriminative ability of the proposed νMOS threshold detector is also increased. The performances of the proposed circuits are validated by HSPICE with Motorola 1.5 µm CMOS device parameters. Furthermore, the operation of a νMOS current mirror is also confirmed through experiments on test chips fabricated by VDEC*. The active area of the proposed νMOS current mirror is 63 µm 51 µm.