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Compact Residue Arithmetic Multiplier Based on the Radix4 SignedDigit MultipleValued Arithmetic Circuits
Shugang WEI Kensuke SHIMIZU
Publication
IEICE TRANSACTIONS on Electronics
Vol.E82C
No.9
pp.16471654 Publication Date: 1999/09/25 Online ISSN:
DOI: Print ISSN: 09168516 Type of Manuscript: Special Section PAPER (Special Issue on Integrated Electronics and New System Paradigms) Category: NonBinary Architectures Keyword: residue number system, signeddigit (SD) number representation, endaround SD adder, binary adder tree, multiplevalued circuits,
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Summary:
A compact residue arithmetic multiplier based on the radix4 signeddigit arithmetic is presented. Conventional residue arithmetic circuits have been designed using binary number arithmetic system, but the carry propagation arises which limits the speed of arithmetic operations in residue modules. In this paper, two radix4 signeddigit (SD) number representations, {2,1,0,1,2} and {3,2,1,0,1,2,3}, are introduced. The former is used for the input and output, and the later for the inner arithmetic circuit of the presented multiplier. Integers 4^{p} and 4^{p} 1 are used as moduli of residue number system (RNS), where p is a positive integer and both circuits for partial product generation and sum of the partial products can be efficiently constructed by using the multiplevalued currentmode circuits. The modulo m addition, m=4^{p} or m=4^{p} 1, can be performed by an SD adder or an endaroundcarry SD adder with the multiplevalued circuits and the addition time is independent of the word length of operands. The modulo m multiplier can be compactly constructed using a binary tree of the multiplevalued modulo m SD adders, and consequently the modulo m multiplication is performed in O(log p) time. The number of MOS transistors required in the presented residue arithmetic multiplier is about 86p^{2} + 66p.

