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A Very Low Spurious Si-Bipolar Frequency Multiplier
Yo YAMAGUCHI Akihiro YAMAGISHI Akira MINAKAWA
IEICE TRANSACTIONS on Electronics
Publication Date: 1999/07/25
Print ISSN: 0916-8516
Type of Manuscript: Special Section PAPER (Special Issue on Microwave and Millimeter Wave Technology)
Category: Active Devices and Circuits
multiplier, low spurious, Si bipolar, frequency doubler,
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A very low spurious frequency doubler for wireless communication systems is proposed. The key to this technique is to change the input signal into a rectangular wave, which effectively suppresses the fundamental frequency and the odd harmonic components. The desired to undesired signal ratio (D/U) is better than 50 dBc at the desired output frequency of 1.1 GHz. The proposed doubler eliminates the need for the band-pass filters which occupy a large part of the radio frequency (RF) module. High order multipliers easily are fabricated with this method. In this paper, a quadrupler is also described.